chip delay line
英 [tʃɪp dɪˈleɪ laɪn]
美 [tʃɪp dɪˈleɪ laɪn]
网络 芯片延迟线
双语例句
- This paper describes a high-resolution and cost-effective TDC ( Time-to-digital converter) system, which mainly consists of a micro-controller and a general-purpose TDC chip based on the delay line technique.
介绍了采用数字延迟线集成电路芯片和微控制器结合组成的高性价比的时间数字化测量系统。